################################################################################ # # File: v1000fg680_64_33.ucf # Rev: 3.0.0 # # Use this file only with the device listed below. Any other # combination is invalid. Do not modify this file except in # regions designated for "User" constraints. # # Copyright (c) 1999 Xilinx, Inc. All rights reserved. # ################################################################################ # Define Device, Package, And Speed Grade ################################################################################ # CONFIG PART = XCV1000-FG680-6 ; # ################################################################################ # Avoid Configuration Pins ################################################################################ # CONFIG PROHIBIT = "B4" ; # IO/RW CONFIG PROHIBIT = "D5" ; # IO/CS CONFIG PROHIBIT = "E3" ; # IO/DOUT/BSY CONFIG PROHIBIT = "C2" ; # IO/DIN/D0 CONFIG PROHIBIT = "P4" ; # IO/D1 CONFIG PROHIBIT = "P3" ; # IO/D2 CONFIG PROHIBIT = "R1" ; # IO/D3 CONFIG PROHIBIT = "AD3" ; # IO/D4 CONFIG PROHIBIT = "AG2" ; # IO/D5 CONFIG PROHIBIT = "AH1" ; # IO/D6 CONFIG PROHIBIT = "AR4" ; # IO/D7 CONFIG PROHIBIT = "AU2" ; # IO/INIT CONFIG PROHIBIT = "C36"; CONFIG PROHIBIT = "B3"; CONFIG PROHIBIT = "C4"; CONFIG PROHIBIT = "E36"; CONFIG PROHIBIT = "AU5"; CONFIG PROHIBIT = "E4"; CONFIG PROHIBIT = "AT5"; CONFIG PROHIBIT = "AV37"; CONFIG PROHIBIT = "AU35"; CONFIG PROHIBIT = "AT37"; CONFIG PROHIBIT = "AU38"; CONFIG PROHIBIT = "AT35"; # ################################################################################ # I/O Assignment ################################################################################ # NET "PCI_CORE/AD_IO<31>" LOC = "E1" ; NET "PCI_CORE/AD_IO<30>" LOC = "H3" ; NET "PCI_CORE/AD_IO<29>" LOC = "F2" ; NET "PCI_CORE/AD_IO<28>" LOC = "J4" ; NET "PCI_CORE/AD_IO<27>" LOC = "F1" ; NET "PCI_CORE/AD_IO<26>" LOC = "J3" ; NET "PCI_CORE/AD_IO<25>" LOC = "G2" ; NET "PCI_CORE/AD_IO<24>" LOC = "G1" ; NET "PCI_CORE/AD_IO<23>" LOC = "K4" ; NET "PCI_CORE/AD_IO<22>" LOC = "H2" ; NET "PCI_CORE/AD_IO<21>" LOC = "K3" ; NET "PCI_CORE/AD_IO<20>" LOC = "H1" ; NET "PCI_CORE/AD_IO<19>" LOC = "L4" ; NET "PCI_CORE/AD_IO<18>" LOC = "J2" ; NET "PCI_CORE/AD_IO<17>" LOC = "L3" ; NET "PCI_CORE/AD_IO<16>" LOC = "J1" ; NET "PCI_CORE/AD_IO<15>" LOC = "M3" ; NET "PCI_CORE/AD_IO<14>" LOC = "K2" ; NET "PCI_CORE/AD_IO<13>" LOC = "N4" ; NET "PCI_CORE/AD_IO<12>" LOC = "K1" ; NET "PCI_CORE/AD_IO<11>" LOC = "N3" ; NET "PCI_CORE/AD_IO<10>" LOC = "L2" ; NET "PCI_CORE/AD_IO<9>" LOC = "L1" ; NET "PCI_CORE/AD_IO<8>" LOC = "R4" ; NET "PCI_CORE/AD_IO<7>" LOC = "M2" ; NET "PCI_CORE/AD_IO<6>" LOC = "R3" ; NET "PCI_CORE/AD_IO<5>" LOC = "M1" ; NET "PCI_CORE/AD_IO<4>" LOC = "T4" ; NET "PCI_CORE/AD_IO<3>" LOC = "N2" ; NET "PCI_CORE/AD_IO<2>" LOC = "N1" ; NET "PCI_CORE/AD_IO<1>" LOC = "T3" ; NET "PCI_CORE/AD_IO<0>" LOC = "P2" ; NET "PCI_CORE/CBE_IO<3>" LOC = "V3" ; NET "PCI_CORE/CBE_IO<2>" LOC = "T1" ; NET "PCI_CORE/CBE_IO<1>" LOC = "W4" ; NET "PCI_CORE/CBE_IO<0>" LOC = "U2" ; NET "PCI_CORE/PAR_IO" LOC = "W3" ; # NET "PCI_CORE/PAR64_IO" LOC = "Y1" ; NET "PCI_CORE/CBE_IO<7>" LOC = "AC3" ; NET "PCI_CORE/CBE_IO<6>" LOC = "AA1" ; NET "PCI_CORE/CBE_IO<5>" LOC = "AC4" ; NET "PCI_CORE/CBE_IO<4>" LOC = "AA2" ; NET "PCI_CORE/AD_IO<63>" LOC = "AE4" ; NET "PCI_CORE/AD_IO<62>" LOC = "AE2" ; NET "PCI_CORE/AD_IO<61>" LOC = "AF3" ; NET "PCI_CORE/AD_IO<60>" LOC = "AF4" ; NET "PCI_CORE/AD_IO<59>" LOC = "AF1" ; NET "PCI_CORE/AD_IO<58>" LOC = "AG3" ; NET "PCI_CORE/AD_IO<57>" LOC = "AF2" ; NET "PCI_CORE/AD_IO<56>" LOC = "AG4" ; NET "PCI_CORE/AD_IO<55>" LOC = "AG1" ; NET "PCI_CORE/AD_IO<54>" LOC = "AH3" ; NET "PCI_CORE/AD_IO<53>" LOC = "AJ2" ; NET "PCI_CORE/AD_IO<52>" LOC = "AH2" ; NET "PCI_CORE/AD_IO<51>" LOC = "AJ3" ; NET "PCI_CORE/AD_IO<50>" LOC = "AJ1" ; NET "PCI_CORE/AD_IO<49>" LOC = "AJ4" ; NET "PCI_CORE/AD_IO<48>" LOC = "AK1" ; NET "PCI_CORE/AD_IO<47>" LOC = "AK3" ; NET "PCI_CORE/AD_IO<46>" LOC = "AK2" ; NET "PCI_CORE/AD_IO<45>" LOC = "AK4" ; NET "PCI_CORE/AD_IO<44>" LOC = "AL1" ; NET "PCI_CORE/AD_IO<43>" LOC = "AL2" ; NET "PCI_CORE/AD_IO<42>" LOC = "AM1" ; NET "PCI_CORE/AD_IO<41>" LOC = "AL3" ; NET "PCI_CORE/AD_IO<40>" LOC = "AM2" ; NET "PCI_CORE/AD_IO<39>" LOC = "AL4" ; NET "PCI_CORE/AD_IO<38>" LOC = "AM3" ; NET "PCI_CORE/AD_IO<37>" LOC = "AN1" ; NET "PCI_CORE/AD_IO<36>" LOC = "AM4" ; NET "PCI_CORE/AD_IO<35>" LOC = "AP1" ; NET "PCI_CORE/AD_IO<34>" LOC = "AN2" ; NET "PCI_CORE/AD_IO<33>" LOC = "AP2" ; NET "PCI_CORE/AD_IO<32>" LOC = "AN3" ; # NET "PCLK" LOC = "D21" ; NET "PCI_CORE/RST_I" LOC = "A19" ; NET "PCI_CORE/GNT_I" LOC = "U1" ; NET "PCI_CORE/ACK64_IO" LOC = "AA3" ; NET "PCI_CORE/DEVSEL_IO" LOC = "V2" ; NET "PCI_CORE/STOP_IO" LOC = "AA4" ; NET "PCI_CORE/REQ64_IO" LOC = "V1" ; NET "PCI_CORE/FRAME_IO" LOC = "AB2" ; NET "PCI_CORE/IRDY_IO" LOC = "W2" ; NET "PCI_CORE/TRDY_IO" LOC = "AB3" ; NET "PCI_CORE/PERR_IO" LOC = "AB4" ; NET "PCI_CORE/SERR_IO" LOC = "W1" ; NET "PCI_CORE/REQ_O" LOC = "T2" ; NET "PCI_CORE/IDSEL_I" LOC = "Y2" ; NET "PCI_CORE/INTA_O" LOC = "AC2" ; # ################################################################################ # Force IOB Flip Flop Use For Data Path Output Flip Flops ################################################################################ # INST "PCI_CORE/PCI_LC/PCI-AD64/IO31/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO30/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO29/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO28/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO27/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO26/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO25/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO24/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO23/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO22/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO21/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO20/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO19/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO18/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO17/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO16/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO15/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO14/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO13/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO12/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO11/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO10/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO9/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO8/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO7/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO6/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO5/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO4/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO3/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO2/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO1/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO0/OFD" IOB = TRUE ; # INST "PCI_CORE/PCI_LC/PAR64/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-CBE64/IO3/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-CBE64/IO2/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-CBE64/IO1/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-CBE64/IO0/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-CBE/IO3/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-CBE/IO2/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-CBE/IO1/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-CBE/IO0/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PAR/OFD" IOB = TRUE ; # INST "PCI_CORE/PCI_LC/PCI-AD/IO31/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO30/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO29/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO28/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO27/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO26/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO25/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO24/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO23/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO22/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO21/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO20/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO19/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO18/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO17/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO16/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO15/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO14/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO13/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO12/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO11/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO10/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO9/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO8/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO7/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO6/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO5/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO4/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO3/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO2/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO1/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO0/OFD" IOB = TRUE ; # ################################################################################ # Force IOB Flip Flop Use For Data Path Input Flip Flops ################################################################################ # INST "PCI_CORE/XPCI_ADQ63" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ62" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ61" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ60" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ59" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ58" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ57" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ56" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ55" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ54" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ53" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ52" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ51" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ50" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ49" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ48" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ47" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ46" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ45" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ44" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ43" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ42" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ41" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ40" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ39" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ38" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ37" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ36" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ35" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ34" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ33" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ32" IOB = TRUE ; # INST "PCI_CORE/XPCI_CBQ7" IOB = TRUE ; INST "PCI_CORE/XPCI_CBQ6" IOB = TRUE ; INST "PCI_CORE/XPCI_CBQ5" IOB = TRUE ; INST "PCI_CORE/XPCI_CBQ4" IOB = TRUE ; INST "PCI_CORE/XPCI_CBQ3" IOB = TRUE ; INST "PCI_CORE/XPCI_CBQ2" IOB = TRUE ; INST "PCI_CORE/XPCI_CBQ1" IOB = TRUE ; INST "PCI_CORE/XPCI_CBQ0" IOB = TRUE ; # INST "PCI_CORE/XPCI_ADQ31" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ30" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ29" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ28" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ27" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ26" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ25" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ24" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ23" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ22" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ21" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ20" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ19" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ18" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ17" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ16" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ15" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ14" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ13" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ12" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ11" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ10" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ9" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ8" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ7" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ6" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ5" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ4" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ3" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ2" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ1" IOB = TRUE ; INST "PCI_CORE/XPCI_ADQ0" IOB = TRUE ; # ################################################################################ # Force IOB Flip Flop Use For Control Signals ################################################################################ # INST "PCI_CORE/PCI_LC/MASTER/REQ_IOB/IFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/MASTER/REQ_IOB/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/MASTER/REQO_OE" IOB = TRUE ; # INST "PCI_CORE/PCI_LC/MASTER/GNT_IOB/IFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/MASTER/GNT_IOB/OFD" IOB = TRUE ; # INST "PCI_CORE/PCI_LC/IDSEL/IFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/IDSEL/OFD" IOB = TRUE ; # INST "PCI_CORE/PCI_LC/PCI-PAR/OE_SERR_FF" IOB = TRUE ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/PERR_OE" IOB = TRUE ; INST "PCI_CORE/PCI_LC/SERR/IFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/SERR/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PERR/IFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PERR/OFD" IOB = TRUE ; # INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OE_FRAME" IOB = TRUE ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OE_REQ64" IOB = TRUE ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OE_IRDY" IOB = TRUE ; INST "PCI_CORE/PCI_LC/FRAME/IFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/FRAME/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/REQ64/IFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/REQ64/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/IRDY/IFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/IRDY/OFD" IOB = TRUE ; # INST "PCI_CORE/PCI_LC/PCI-CNTL/PCI-OFCN/PCI-XOE/OE_DEVSEL" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-CNTL/PCI-OFCN/PCI-XOE/OE_ACK64" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-CNTL/PCI-OFCN/PCI-XOE/OE_STOP" IOB = TRUE ; INST "PCI_CORE/PCI_LC/PCI-CNTL/PCI-OFCN/PCI-XOE/OE_TRDY" IOB = TRUE ; INST "PCI_CORE/PCI_LC/DEVSEL/IFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/DEVSEL/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/ACK64/IFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/ACK64/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/STOP/IFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/STOP/OFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/TRDY/IFD" IOB = TRUE ; INST "PCI_CORE/PCI_LC/TRDY/OFD" IOB = TRUE ; # ################################################################################ # Location Constraints For AD TBUFs ################################################################################ # INST "PCI_CORE/PCI_LC/E64/UPPER/T15" LOC = "TBUF_R39C96.0" ; INST "PCI_CORE/PCI_LC/E64/UPPER/T14" LOC = "TBUF_R39C96.1" ; INST "PCI_CORE/PCI_LC/E64/UPPER/T13" LOC = "TBUF_R40C96.0" ; INST "PCI_CORE/PCI_LC/E64/UPPER/T12" LOC = "TBUF_R40C96.1" ; INST "PCI_CORE/PCI_LC/E64/UPPER/T11" LOC = "TBUF_R41C96.0" ; INST "PCI_CORE/PCI_LC/E64/UPPER/T10" LOC = "TBUF_R41C96.1" ; INST "PCI_CORE/PCI_LC/E64/UPPER/T9" LOC = "TBUF_R42C96.0" ; INST "PCI_CORE/PCI_LC/E64/UPPER/T8" LOC = "TBUF_R42C96.1" ; INST "PCI_CORE/PCI_LC/E64/UPPER/T7" LOC = "TBUF_R43C96.0" ; INST "PCI_CORE/PCI_LC/E64/UPPER/T6" LOC = "TBUF_R43C96.1" ; INST "PCI_CORE/PCI_LC/E64/UPPER/T5" LOC = "TBUF_R44C96.0" ; INST "PCI_CORE/PCI_LC/E64/UPPER/T4" LOC = "TBUF_R44C96.1" ; INST "PCI_CORE/PCI_LC/E64/UPPER/T3" LOC = "TBUF_R45C96.0" ; INST "PCI_CORE/PCI_LC/E64/UPPER/T2" LOC = "TBUF_R45C96.1" ; INST "PCI_CORE/PCI_LC/E64/UPPER/T1" LOC = "TBUF_R46C96.0" ; INST "PCI_CORE/PCI_LC/E64/UPPER/T0" LOC = "TBUF_R46C96.1" ; # INST "PCI_CORE/PCI_LC/E64/LOWER/T15" LOC = "TBUF_R47C96.0" ; INST "PCI_CORE/PCI_LC/E64/LOWER/T14" LOC = "TBUF_R47C96.1" ; INST "PCI_CORE/PCI_LC/E64/LOWER/T13" LOC = "TBUF_R48C96.0" ; INST "PCI_CORE/PCI_LC/E64/LOWER/T12" LOC = "TBUF_R48C96.1" ; INST "PCI_CORE/PCI_LC/E64/LOWER/T11" LOC = "TBUF_R49C96.0" ; INST "PCI_CORE/PCI_LC/E64/LOWER/T10" LOC = "TBUF_R49C96.1" ; INST "PCI_CORE/PCI_LC/E64/LOWER/T9" LOC = "TBUF_R50C96.0" ; INST "PCI_CORE/PCI_LC/E64/LOWER/T8" LOC = "TBUF_R50C96.1" ; INST "PCI_CORE/PCI_LC/E64/LOWER/T7" LOC = "TBUF_R51C96.0" ; INST "PCI_CORE/PCI_LC/E64/LOWER/T6" LOC = "TBUF_R51C96.1" ; INST "PCI_CORE/PCI_LC/E64/LOWER/T5" LOC = "TBUF_R52C96.0" ; INST "PCI_CORE/PCI_LC/E64/LOWER/T4" LOC = "TBUF_R52C96.1" ; INST "PCI_CORE/PCI_LC/E64/LOWER/T3" LOC = "TBUF_R53C96.0" ; INST "PCI_CORE/PCI_LC/E64/LOWER/T2" LOC = "TBUF_R53C96.1" ; INST "PCI_CORE/PCI_LC/E64/LOWER/T1" LOC = "TBUF_R54C96.0" ; INST "PCI_CORE/PCI_LC/E64/LOWER/T0" LOC = "TBUF_R54C96.1" ; # INST "PCI_CORE/PCI_LC/E/UPPER/T15" LOC = "TBUF_R11C96.0" ; INST "PCI_CORE/PCI_LC/E/UPPER/T14" LOC = "TBUF_R11C96.1" ; INST "PCI_CORE/PCI_LC/E/UPPER/T13" LOC = "TBUF_R12C96.0" ; INST "PCI_CORE/PCI_LC/E/UPPER/T12" LOC = "TBUF_R12C96.1" ; INST "PCI_CORE/PCI_LC/E/UPPER/T11" LOC = "TBUF_R13C96.0" ; INST "PCI_CORE/PCI_LC/E/UPPER/T10" LOC = "TBUF_R13C96.1" ; INST "PCI_CORE/PCI_LC/E/UPPER/T9" LOC = "TBUF_R14C96.0" ; INST "PCI_CORE/PCI_LC/E/UPPER/T8" LOC = "TBUF_R14C96.1" ; INST "PCI_CORE/PCI_LC/E/UPPER/T7" LOC = "TBUF_R15C96.0" ; INST "PCI_CORE/PCI_LC/E/UPPER/T6" LOC = "TBUF_R15C96.1" ; INST "PCI_CORE/PCI_LC/E/UPPER/T5" LOC = "TBUF_R16C96.0" ; INST "PCI_CORE/PCI_LC/E/UPPER/T4" LOC = "TBUF_R16C96.1" ; INST "PCI_CORE/PCI_LC/E/UPPER/T3" LOC = "TBUF_R17C96.0" ; INST "PCI_CORE/PCI_LC/E/UPPER/T2" LOC = "TBUF_R17C96.1" ; INST "PCI_CORE/PCI_LC/E/UPPER/T1" LOC = "TBUF_R18C96.0" ; INST "PCI_CORE/PCI_LC/E/UPPER/T0" LOC = "TBUF_R18C96.1" ; # INST "PCI_CORE/PCI_LC/E/LOWER/T15" LOC = "TBUF_R19C96.0" ; INST "PCI_CORE/PCI_LC/E/LOWER/T14" LOC = "TBUF_R19C96.1" ; INST "PCI_CORE/PCI_LC/E/LOWER/T13" LOC = "TBUF_R20C96.0" ; INST "PCI_CORE/PCI_LC/E/LOWER/T12" LOC = "TBUF_R20C96.1" ; INST "PCI_CORE/PCI_LC/E/LOWER/T11" LOC = "TBUF_R21C96.0" ; INST "PCI_CORE/PCI_LC/E/LOWER/T10" LOC = "TBUF_R21C96.1" ; INST "PCI_CORE/PCI_LC/E/LOWER/T9" LOC = "TBUF_R22C96.0" ; INST "PCI_CORE/PCI_LC/E/LOWER/T8" LOC = "TBUF_R22C96.1" ; INST "PCI_CORE/PCI_LC/E/LOWER/T7" LOC = "TBUF_R23C96.0" ; INST "PCI_CORE/PCI_LC/E/LOWER/T6" LOC = "TBUF_R23C96.1" ; INST "PCI_CORE/PCI_LC/E/LOWER/T5" LOC = "TBUF_R24C96.0" ; INST "PCI_CORE/PCI_LC/E/LOWER/T4" LOC = "TBUF_R24C96.1" ; INST "PCI_CORE/PCI_LC/E/LOWER/T3" LOC = "TBUF_R25C96.0" ; INST "PCI_CORE/PCI_LC/E/LOWER/T2" LOC = "TBUF_R25C96.1" ; INST "PCI_CORE/PCI_LC/E/LOWER/T1" LOC = "TBUF_R26C96.0" ; INST "PCI_CORE/PCI_LC/E/LOWER/T0" LOC = "TBUF_R26C96.1" ; # ################################################################################ # Placement Constraints For Control Signal "NS" Functions ################################################################################ # # **** NS_REQ **** (G, F, X) INST "PCI_CORE/PCI_LC/MASTER/REQ/REQ1" LOC = "CLB_R26C96.S0" ; INST "PCI_CORE/PCI_LC/MASTER/REQ/REQ3" LOC = "CLB_R26C96.S0" ; INST "PCI_CORE/PCI_LC/MASTER/REQ/IREQ_I-" LOC = "CLB_R26C96.S0" ; # # **** NS_DEVSEL **** (F, G, X) INST "PCI_CORE/PCI_LC/PCI-CNTL/PCI-OFCN/PCI-DSEL/DSEL5" LOC = "CLB_R30C96.S0" ; INST "PCI_CORE/PCI_LC/PCI-CNTL/PCI-OFCN/PCI-DSEL/DSEL11" LOC = "CLB_R30C96.S0" ; INST "PCI_CORE/PCI_LC/PCI-CNTL/PCI-OFCN/PCI-DSEL/DEVSEL" LOC = "CLB_R30C96.S0" ; # # **** NS_STOP **** (F, G, X) INST "PCI_CORE/PCI_LC/PCI-CNTL/PCI-OFCN/PCI-STOP/STOP12" LOC = "CLB_R31C96.S0" ; INST "PCI_CORE/PCI_LC/PCI-CNTL/PCI-OFCN/PCI-STOP/STOP13" LOC = "CLB_R31C96.S0" ; INST "PCI_CORE/PCI_LC/PCI-CNTL/PCI-OFCN/PCI-STOP/STOP" LOC = "CLB_R31C96.S0" ; # # **** NS_IRDY **** (F, G, X) INST "PCI_CORE/PCI_LC/MASTER/IRDY/IRDY3" LOC = "CLB_R32C96.S0" ; INST "PCI_CORE/PCI_LC/MASTER/IRDY/IRDY4" LOC = "CLB_R32C96.S0" ; INST "PCI_CORE/PCI_LC/MASTER/IRDY/IIRDY_I-" LOC = "CLB_R32C96.S0" ; # # **** NS_TRDY **** (G, F, X) INST "PCI_CORE/PCI_LC/PCI-CNTL/PCI-OFCN/PCI-TRDY/TRDY10" LOC = "CLB_R33C96.S0" ; INST "PCI_CORE/PCI_LC/PCI-CNTL/PCI-OFCN/PCI-TRDY/TRDY11" LOC = "CLB_R33C96.S0" ; INST "PCI_CORE/PCI_LC/PCI-CNTL/PCI-OFCN/PCI-TRDY/TRDY" LOC = "CLB_R33C96.S0" ; # # **** NS_FRAME **** (G, F, X) INST "PCI_CORE/PCI_LC/MASTER/FRAME/FRAME3" LOC = "CLB_R32C96.S1" ; INST "PCI_CORE/PCI_LC/MASTER/FRAME/FRAME4" LOC = "CLB_R32C96.S1" ; INST "PCI_CORE/PCI_LC/MASTER/FRAME/IFRAME_I-" LOC = "CLB_R32C96.S1" ; # # **** CE_FRAME **** (F) INST "PCI_CORE/PCI_LC/MASTER/FRAME/FRAME_5" LOC = "CLB_R32C95.S0" ; # # **** NS_ACK64 **** (F, G, X) INST "PCI_CORE/PCI_LC/PCI-CNTL/PCI-OFCN/PCI-AK64/ACK5" LOC = "CLB_R30C96.S1" ; INST "PCI_CORE/PCI_LC/PCI-CNTL/PCI-OFCN/PCI-AK64/ACK11" LOC = "CLB_R30C96.S1" ; INST "PCI_CORE/PCI_LC/PCI-CNTL/PCI-OFCN/PCI-AK64/ACK64" LOC = "CLB_R30C96.S1" ; # # **** NS_REQ64 **** (G, F, X) INST "PCI_CORE/PCI_LC/MASTER/REQ64/REQ643" LOC = "CLB_R31C96.S1" ; INST "PCI_CORE/PCI_LC/MASTER/REQ64/REQ644" LOC = "CLB_R31C96.S1" ; INST "PCI_CORE/PCI_LC/MASTER/REQ64/IREQ64_I-" LOC = "CLB_R31C96.S1" ; # # **** CE_REQ64 **** (F) INST "PCI_CORE/PCI_LC/MASTER/REQ64/REQ645" LOC = "CLB_R31C95.S0" ; # # **** NS_PERR **** (G, F, X) INST "PCI_CORE/PCI_LC/PCI-PAR/PERR_1" LOC = "CLB_R34C96.S0" ; INST "PCI_CORE/PCI_LC/PCI-PAR/PERR_2" LOC = "CLB_R34C96.S0" ; INST "PCI_CORE/PCI_LC/PCI-PAR/LC_PERR" LOC = "CLB_R34C96.S0" ; # ################################################################################ # Placement Constraints For Parity / Byte Enable "NS" Functions ################################################################################ # # **** NS_PAR **** (G, F) INST "PCI_CORE/PCI_LC/PCI-PAR/PAR_1" LOC = "CLB_R29C96.S0" ; INST "PCI_CORE/PCI_LC/PCI-PAR/PAR_2" LOC = "CLB_R29C96.S0" ; # # **** NS_PAR64 **** (G, F) INST "PCI_CORE/PCI_LC/PCI-PAR/PAR64_1" LOC = "CLB_R36C96.S0" ; INST "PCI_CORE/PCI_LC/PCI-PAR/PAR64_2" LOC = "CLB_R36C96.S0" ; # # **** NS_CBE **** (F, G, F, G, F, G, F, G) INST "PCI_CORE/PCI_LC/PCI-CBE/IO3/MAPF" LOC = "CLB_R27C96.S1" ; INST "PCI_CORE/PCI_LC/PCI-CBE/IO3/MAPG" LOC = "CLB_R27C96.S1" ; INST "PCI_CORE/PCI_LC/PCI-CBE/IO2/MAPF" LOC = "CLB_R27C96.S0" ; INST "PCI_CORE/PCI_LC/PCI-CBE/IO2/MAPG" LOC = "CLB_R27C96.S0" ; INST "PCI_CORE/PCI_LC/PCI-CBE/IO1/MAPF" LOC = "CLB_R28C96.S1" ; INST "PCI_CORE/PCI_LC/PCI-CBE/IO1/MAPG" LOC = "CLB_R28C96.S1" ; INST "PCI_CORE/PCI_LC/PCI-CBE/IO0/MAPF" LOC = "CLB_R28C96.S0" ; INST "PCI_CORE/PCI_LC/PCI-CBE/IO0/MAPG" LOC = "CLB_R28C96.S0" ; # # **** NS_CBE64 **** (F, G, F, G, F, G, F, G) INST "PCI_CORE/PCI_LC/PCI-CBE64/IO3/MAPF" LOC = "CLB_R37C96.S1" ; INST "PCI_CORE/PCI_LC/PCI-CBE64/IO3/MAPG" LOC = "CLB_R37C96.S1" ; INST "PCI_CORE/PCI_LC/PCI-CBE64/IO2/MAPF" LOC = "CLB_R37C96.S0" ; INST "PCI_CORE/PCI_LC/PCI-CBE64/IO2/MAPG" LOC = "CLB_R37C96.S0" ; INST "PCI_CORE/PCI_LC/PCI-CBE64/IO1/MAPF" LOC = "CLB_R38C96.S1" ; INST "PCI_CORE/PCI_LC/PCI-CBE64/IO1/MAPG" LOC = "CLB_R38C96.S1" ; INST "PCI_CORE/PCI_LC/PCI-CBE64/IO0/MAPF" LOC = "CLB_R38C96.S0" ; INST "PCI_CORE/PCI_LC/PCI-CBE64/IO0/MAPG" LOC = "CLB_R38C96.S0" ; # ################################################################################ # Placement Constraints For Control Signal "OE" Functions ################################################################################ # # **** OE_COMMON **** (G, F) INST "PCI_CORE/PCI_LC/PCI-CNTL/PCI-OFCN/PCI-XOE/OTI_1" LOC = "CLB_R30C95.S0" ; INST "PCI_CORE/PCI_LC/PCI-CNTL/PCI-OFCN/PCI-XOE/OTI_3" LOC = "CLB_R30C95.S0" ; # # **** OE_FRAME **** (G, F, X) INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OEF1" LOC = "CLB_R32C95.S1" ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OEF2" LOC = "CLB_R32C95.S1" ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OE_FRAME_INT" LOC = "CLB_R32C95.S1" ; # # **** OE_REQ64 **** (G, F, X) INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OER1" LOC = "CLB_R31C95.S1" ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OER2" LOC = "CLB_R31C95.S1" ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OE_REQ64_INT" LOC = "CLB_R31C95.S1" ; # # **** OE_ACK64 **** (G, F) INST "PCI_CORE/PCI_LC/PCI-CNTL/PCI-OFCN/PCI-XOE/OAI_1" LOC = "CLB_R30C95.S1" ; INST "PCI_CORE/PCI_LC/PCI-CNTL/PCI-OFCN/PCI-XOE/OAI_3" LOC = "CLB_R30C95.S1" ; # ################################################################################ # Placement Constraints For Common Live Logic ################################################################################ # # **** APERR_N **** (G, F, X) INST "PCI_CORE/PCI_LC/PCI-PAR/APERR_1" LOC = "CLB_R34C96.S1" ; INST "PCI_CORE/PCI_LC/PCI-PAR/APERR_2" LOC = "CLB_R34C96.S1" ; INST "PCI_CORE/PCI_LC/PCI-PAR/APERR_N" LOC = "CLB_R34C96.S1" ; # # **** DATA_VLD **** (G, X, F, X) INST "PCI_CORE/PCI_LC/DATA_VLD/MDV_MAP" LOC = "CLB_R34C94.S1" ; INST "PCI_CORE/PCI_LC/DATA_VLD/MDV_FF" LOC = "CLB_R34C94.S1" ; INST "PCI_CORE/PCI_LC/DATA_VLD/SDV_MAP" LOC = "CLB_R34C94.S1" ; INST "PCI_CORE/PCI_LC/DATA_VLD/SDV_FF" LOC = "CLB_R34C94.S1" ; # # **** OUT_SEL **** (F, X, G, X) INST "PCI_CORE/PCI_LC/OUT_SEL/OSEL3" LOC = "CLB_R34C94.S0" ; INST "PCI_CORE/PCI_LC/OUT_SEL/OSEL_FF" LOC = "CLB_R34C94.S0" ; INST "PCI_CORE/PCI_LC/OUT_SEL/OSEL4" LOC = "CLB_R34C94.S0" ; INST "PCI_CORE/PCI_LC/OUT_SEL/OSEL64_FF" LOC = "CLB_R34C94.S0" ; # # **** EOT **** (G, F, X) INST "PCI_CORE/PCI_LC/EOT/EOT0" LOC = "CLB_R31C94.S0" ; INST "PCI_CORE/PCI_LC/EOT/EOT1" LOC = "CLB_R31C94.S0" ; INST "PCI_CORE/PCI_LC/EOT/EOT_FF" LOC = "CLB_R31C94.S0" ; # # **** NEWDATA **** (G, F, X) INST "PCI_CORE/PCI_LC/OUT_CE/ND1" LOC = "CLB_R34C95.S0" ; INST "PCI_CORE/PCI_LC/OUT_CE/ND2" LOC = "CLB_R34C95.S0" ; INST "PCI_CORE/PCI_LC/OUT_CE/NDFF" LOC = "CLB_R34C95.S0" ; # # **** PAR_CE **** (G, F, X) INST "PCI_CORE/PCI_LC/OUT_CE/ZCEB1" LOC = "CLB_R34C95.S1" ; INST "PCI_CORE/PCI_LC/OUT_CE/ZCEB2" LOC = "CLB_R34C95.S1" ; INST "PCI_CORE/PCI_LC/OUT_CE/PAR_CE" LOC = "CLB_R34C95.S1" ; # ################################################################################ # Placement Constraints For Target Live Logic ################################################################################ # # **** PWIN **** (G, F, X, X) INST "PCI_CORE/PCI_LC/PCI-CNTL/PWIN1" LOC = "CLB_R33C96.S1" ; INST "PCI_CORE/PCI_LC/PCI-CNTL/PWIN2" LOC = "CLB_R33C96.S1" ; INST "PCI_CORE/PCI_LC/PCI-CNTL/PWIN_FF" LOC = "CLB_R33C96.S1" ; INST "PCI_CORE/PCI_LC/PCI-CNTL/PWIN64_FF" LOC = "CLB_R33C96.S1" ; # # **** S_FIRST **** (G, F, X) INST "PCI_CORE/PCI_LC/PCI-CNTL/PCI-OFCN/PCI-TRDY/SF3" LOC = "CLB_R33C95.S0" ; INST "PCI_CORE/PCI_LC/PCI-CNTL/PCI-OFCN/PCI-TRDY/SF4" LOC = "CLB_R33C95.S0" ; INST "PCI_CORE/PCI_LC/PCI-CNTL/PCI-OFCN/PCI-TRDY/S1FF" LOC = "CLB_R33C95.S0" ; # ################################################################################ # Placement Constraints For Initiator Live Logic ################################################################################ # # **** S_TAR **** (G, X) INST "PCI_CORE/PCI_LC/MASTER/S_TAR/S_TAR_MAP" LOC = "CLB_R32C94.S1" ; INST "PCI_CORE/PCI_LC/MASTER/S_TAR/S_TAR" LOC = "CLB_R32C94.S1" ; # # **** FRAME TURN_ON **** (G) INST "PCI_CORE/PCI_LC/MASTER/FRAME/FRAME2" LOC = "CLB_R32C95.S0" ; # # **** REQ64 TURN_ON **** (G) INST "PCI_CORE/PCI_LC/MASTER/REQ64/REQ642" LOC = "CLB_R31C95.S0" ; # # **** M_FIRST **** (G, F, X) INST "PCI_CORE/PCI_LC/MASTER/IRDY/MF1" LOC = "CLB_R33C95.S1" ; INST "PCI_CORE/PCI_LC/MASTER/IRDY/MF2" LOC = "CLB_R33C95.S1" ; INST "PCI_CORE/PCI_LC/MASTER/IRDY/M1FF" LOC = "CLB_R33C95.S1" ; # # **** FAIL64 **** (G, F, X) INST "PCI_CORE/PCI_LC/MASTER/XFERFAIL/FAIL1" LOC = "CLB_R31C94.S1" ; INST "PCI_CORE/PCI_LC/MASTER/XFERFAIL/FAIL2" LOC = "CLB_R31C94.S1" ; INST "PCI_CORE/PCI_LC/MASTER/XFERFAIL/FAIL_FF" LOC = "CLB_R31C94.S1" ; # # **** I_IDLE **** (G, F, X) INST "PCI_CORE/PCI_LC/MASTER/I_IDLE/IIDLE4" LOC = "CLB_R29C95.S1" ; INST "PCI_CORE/PCI_LC/MASTER/I_IDLE/IIDLE5" LOC = "CLB_R29C95.S1" ; INST "PCI_CORE/PCI_LC/MASTER/I_IDLE/I_IDLE_FF" LOC = "CLB_R29C95.S1" ; # # **** ADDR_BE **** (G, F, X, G, X) INST "PCI_CORE/PCI_LC/MASTER/ADDR/ADDR" LOC = "CLB_R33C94.S1" ; INST "PCI_CORE/PCI_LC/MASTER/ADDR/ABE" LOC = "CLB_R29C96.S1" ; INST "PCI_CORE/PCI_LC/MASTER/ADDR/ABE_FF" LOC = "CLB_R29C96.S1" ; INST "PCI_CORE/PCI_LC/MASTER/ADDR/MAN" LOC = "CLB_R29C96.S1" ; INST "PCI_CORE/PCI_LC/MASTER/ADDR/MAN_FF" LOC = "CLB_R29C96.S1" ; # # **** DR_BUS **** (G, F, X) INST "PCI_CORE/PCI_LC/MASTER/DR_BUS/DRB6" LOC = "CLB_R29C95.S0" ; INST "PCI_CORE/PCI_LC/MASTER/DR_BUS/DRB9" LOC = "CLB_R29C95.S0" ; INST "PCI_CORE/PCI_LC/MASTER/DR_BUS/DR_BUS_FF" LOC = "CLB_R29C95.S0" ; # # **** M_DATA **** (G, F, X, X) INST "PCI_CORE/PCI_LC/MASTER/M_DATA/MDA1" LOC = "CLB_R29C94.S0" ; INST "PCI_CORE/PCI_LC/MASTER/M_DATA/MDA2" LOC = "CLB_R29C94.S0" ; INST "PCI_CORE/PCI_LC/MASTER/M_DATA/M_DATA" LOC = "CLB_R29C94.S0" ; INST "PCI_CORE/PCI_LC/MASTER/M_DATA/M_DATA1" LOC = "CLB_R29C94.S0" ; # # **** PRE-SLOT (HAS GNT) **** (F, G) INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/SLOT32_1" LOC = "CLB_R32C94.S0" ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/SLOT32_3" LOC = "CLB_R32C94.S0" ; # # **** SLOT (PUT NEAR START_AD) **** (G, F, X) INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/SLOT32_2" LOC = "CLB_R32C93.S1" ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/SLOT32_4" LOC = "CLB_R32C93.S1" ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/SLOT_FF" LOC = "CLB_R32C93.S1" ; # # **** PRE-SLOT64 (HAS GNT) **** (F, G) INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/SLOT64_1" LOC = "CLB_R33C94.S0" ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/SLOT64_3" LOC = "CLB_R33C94.S0" ; # # **** SLOT64 (PUT NEAR START_AD) **** (G, F, X) INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/SLOT64_2" LOC = "CLB_R33C93.S1" ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/SLOT64_4" LOC = "CLB_R33C93.S1" ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/SLOT64_FF" LOC = "CLB_R33C93.S1" ; # # **** START_AD **** (G) INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/SAD1" LOC = "CLB_R32C93.S0" ; # # **** START_AD64 **** (G) INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/SAD2" LOC = "CLB_R33C93.S0" ; # ################################################################################ # Placement Constraints For Parity / Byte Enable / Datapath "OE" Functions ################################################################################ # # **** OE_T64 **** (G, G) INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OA64_1" LOC = "CLB_R33C91.S0" ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OA64_2" LOC = "CLB_R33C92.S0" ; # # **** OE_LT64 **** (F, F) INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OA64_3" LOC = "CLB_R33C91.S0" ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OA64_4" LOC = "CLB_R33C92.S0" ; # # **** OE_LB64 **** (G, G) INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OA64_5" LOC = "CLB_R33C91.S1" ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OA64_6" LOC = "CLB_R33C92.S1" ; # # **** OE_B64 **** (F, F, X) INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OA64_7" LOC = "CLB_R33C91.S1" ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OA64_8" LOC = "CLB_R33C92.S1" ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/H_PAR_OE" LOC = "CLB_R33C92.S1" ; # # **** OE_CBE64 **** (F, F) INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OC64_1" LOC = "CLB_R33C94.S1" ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OC64_2" LOC = "CLB_R33C93.S0" ; # # **** OE_T **** (G, G) INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OA32_1" LOC = "CLB_R32C91.S0" ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OA32_2" LOC = "CLB_R32C92.S0" ; # # **** OE_LT **** (F, F) INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OA32_3" LOC = "CLB_R32C91.S0" ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OA32_4" LOC = "CLB_R32C92.S0" ; # # **** OE_LB **** (G, G) INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OA32_5" LOC = "CLB_R32C91.S1" ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OA32_6" LOC = "CLB_R32C92.S1" ; # # **** OE_B **** (F, F, X) INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OA32_7" LOC = "CLB_R32C91.S1" ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OA32_8" LOC = "CLB_R32C92.S1" ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/L_PAR_OE" LOC = "CLB_R32C92.S1" ; # # **** OE_CBE **** (F, F) INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OC32_1" LOC = "CLB_R32C94.S1" ; INST "PCI_CORE/PCI_LC/MASTER/OE_FRAME/OC32_2" LOC = "CLB_R32C93.S0" ; # ################################################################################ # Placement Constraints For Less Important Things ################################################################################ # # **** DEVICE TIMEOUT A **** (F, G, F, G) INST "PCI_CORE/PCI_LC/MASTER/FRAME/FRAME6" LOC = "CLB_R31C93.S0" ; INST "PCI_CORE/PCI_LC/MASTER/FRAME/FRAME8" LOC = "CLB_R31C93.S0" ; INST "PCI_CORE/PCI_LC/MASTER/FRAME/FRAME7" LOC = "CLB_R31C93.S1" ; INST "PCI_CORE/PCI_LC/MASTER/FRAME/FRAME9" LOC = "CLB_R31C93.S1" ; # # **** DEVICE TIMEOUT B **** (F, G, F, G) INST "PCI_CORE/PCI_LC/MASTER/REQ64/REQ646" LOC = "CLB_R30C94.S0" ; INST "PCI_CORE/PCI_LC/MASTER/REQ64/REQ648" LOC = "CLB_R30C94.S0" ; INST "PCI_CORE/PCI_LC/MASTER/REQ64/REQ647" LOC = "CLB_R30C94.S1" ; INST "PCI_CORE/PCI_LC/MASTER/REQ64/REQ649" LOC = "CLB_R30C94.S1" ; # ################################################################################ # Clock Buffer Placement ################################################################################ # INST "PCI_CORE/XPCI_CKA" LOC = "GCLKBUF2" ; # ################################################################################ # Netflag Attributes ################################################################################ # NET "PCI_CORE/PCI_LC/FRAME-" S ; NET "PCI_CORE/PCI_LC/REQ64-" S ; NET "PCI_CORE/PCI_LC/IRDY-" S ; NET "PCI_CORE/PCI_LC/DEVSEL-" S ; NET "PCI_CORE/PCI_LC/ACK64-" S ; NET "PCI_CORE/PCI_LC/TRDY-" S ; NET "PCI_CORE/PCI_LC/STOP-" S ; NET "PCI_CORE/PCI_LC/PERR-" S ; NET "PCI_CORE/PCI_LC/SERR-" S ; # NET "PCI_CORE/PCI_LC/M_SRC_EN" S ; NET "PCI_CORE/PCI_LC/S_SRC_EN" S ; NET "PCI_CORE/PCI_LC/M_DATA_VLD" S ; NET "PCI_CORE/PCI_LC/S_DATA_VLD" S ; NET "PCI_CORE/PCI_LC/S_DATA" S ; NET "PCI_CORE/PCI_LC/M_DATA" S ; # NET "PCI_CORE/PCI_LC/M_ADDR_N" S ; # ################################################################################ # I/O Time Names ################################################################################ # NET "PCI_CORE/AD_IO<63>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<62>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<61>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<60>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<59>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<58>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<57>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<56>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<55>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<54>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<53>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<52>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<51>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<50>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<49>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<48>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<47>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<46>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<45>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<44>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<43>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<42>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<41>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<40>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<39>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<38>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<37>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<36>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<35>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<34>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<33>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<32>" TNM = PADS:PCI_PADS_D ; # NET "PCI_CORE/SERR_IO" TNM = PADS:PCI_PADS_C ; NET "PCI_CORE/PERR_IO" TNM = PADS:PCI_PADS_C ; NET "PCI_CORE/PAR64_IO" TNM = PADS:PCI_PADS_P ; NET "PCI_CORE/CBE_IO<7>" TNM = PADS:PCI_PADS_B ; NET "PCI_CORE/CBE_IO<6>" TNM = PADS:PCI_PADS_B ; NET "PCI_CORE/CBE_IO<5>" TNM = PADS:PCI_PADS_B ; NET "PCI_CORE/CBE_IO<4>" TNM = PADS:PCI_PADS_B ; NET "PCI_CORE/REQ_O" TNM = PADS:PCI_PADS_C ; NET "PCI_CORE/GNT_I" TNM = PADS:PCI_PADS_G ; NET "PCI_CORE/FRAME_IO" TNM = PADS:PCI_PADS_C ; NET "PCI_CORE/REQ64_IO" TNM = PADS:PCI_PADS_C ; NET "PCI_CORE/IRDY_IO" TNM = PADS:PCI_PADS_C ; NET "PCI_CORE/TRDY_IO" TNM = PADS:PCI_PADS_C ; NET "PCI_CORE/DEVSEL_IO" TNM = PADS:PCI_PADS_C ; NET "PCI_CORE/ACK64_IO" TNM = PADS:PCI_PADS_C ; NET "PCI_CORE/STOP_IO" TNM = PADS:PCI_PADS_C ; NET "PCI_CORE/CBE_IO<3>" TNM = PADS:PCI_PADS_B ; NET "PCI_CORE/CBE_IO<2>" TNM = PADS:PCI_PADS_B ; NET "PCI_CORE/CBE_IO<1>" TNM = PADS:PCI_PADS_B ; NET "PCI_CORE/CBE_IO<0>" TNM = PADS:PCI_PADS_B ; NET "PCI_CORE/PAR_IO" TNM = PADS:PCI_PADS_P ; NET "PCI_CORE/IDSEL_I" TNM = PADS:PCI_PADS_C ; NET "PCI_CORE/INTA_O" TNM = PADS:PCI_PADS_X ; NET "PCI_CORE/RST_I" TNM = PADS:PCI_PADS_X ; # NET "PCI_CORE/AD_IO<31>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<30>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<29>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<28>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<27>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<26>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<25>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<24>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<23>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<22>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<21>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<20>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<19>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<18>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<17>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<16>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<15>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<14>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<13>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<12>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<11>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<10>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<9>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<8>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<7>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<6>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<5>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<4>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<3>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<2>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<1>" TNM = PADS:PCI_PADS_D ; NET "PCI_CORE/AD_IO<0>" TNM = PADS:PCI_PADS_D ; # ################################################################################ # Special I/O Time Names ################################################################################ # INST "PCI_CORE/PCI_LC/PCI-AD64/IO31/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO30/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO29/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO28/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO27/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO26/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO25/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO24/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO23/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO22/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO21/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO20/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO19/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO18/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO17/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO16/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO15/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO14/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO13/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO12/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO11/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO10/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO9/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO8/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO7/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO6/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO5/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO4/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO3/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO2/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO1/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD64/IO0/OFD" TNM = FFS:PCI_FFS_OCE ; # INST "PCI_CORE/PCI_LC/PCI-CBE64/IO3/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-CBE64/IO2/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-CBE64/IO1/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-CBE64/IO0/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-CBE/IO3/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-CBE/IO2/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-CBE/IO1/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-CBE/IO0/OFD" TNM = FFS:PCI_FFS_OCE ; # INST "PCI_CORE/PCI_LC/PCI-AD/IO31/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO30/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO29/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO28/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO27/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO26/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO25/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO24/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO23/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO22/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO21/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO20/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO19/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO18/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO17/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO16/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO15/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO14/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO13/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO12/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO11/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO10/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO9/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO8/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO7/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO6/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO5/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO4/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO3/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO2/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO1/OFD" TNM = FFS:PCI_FFS_OCE ; INST "PCI_CORE/PCI_LC/PCI-AD/IO0/OFD" TNM = FFS:PCI_FFS_OCE ; # INST "PCI_CORE/XPCI_ADQ63" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ62" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ61" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ60" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ59" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ58" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ57" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ56" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ55" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ54" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ53" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ52" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ51" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ50" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ49" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ48" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ47" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ46" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ45" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ44" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ43" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ42" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ41" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ40" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ39" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ38" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ37" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ36" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ35" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ34" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ33" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ32" TNM = FFS:PCI_FFS_ICE ; # INST "PCI_CORE/XPCI_CBQ7" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_CBQ6" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_CBQ5" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_CBQ4" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_CBQ3" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_CBQ2" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_CBQ1" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_CBQ0" TNM = FFS:PCI_FFS_ICE ; # INST "PCI_CORE/XPCI_ADQ31" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ30" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ29" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ28" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ27" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ26" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ25" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ24" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ23" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ22" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ21" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ20" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ19" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ18" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ17" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ16" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ15" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ14" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ13" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ12" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ11" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ10" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ9" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ8" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ7" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ6" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ5" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ4" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ3" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ2" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ1" TNM = FFS:PCI_FFS_ICE ; INST "PCI_CORE/XPCI_ADQ0" TNM = FFS:PCI_FFS_ICE ; # ################################################################################ # Time Groups ################################################################################ # INST "PCI_CORE" TNM = FFS:PCIM_FFS ; TIMEGRP "ALL_FFS" = "PCIM_FFS" : "USER_FFS" ; TIMEGRP "FAST_FFS" = "PCI_FFS_ICE" : "PCI_FFS_OCE" ; TIMEGRP "SLOW_FFS" = "ALL_FFS" : EXCEPT : "FAST_FFS" ; # ################################################################################ # Time Specs ################################################################################ # # Important Note: The timespecs used in this section cover all possible # paths. Depending on the design options, some of the timespecs may # not contain any paths. Such timespecs are ignored by PAR and TRCE. # # Note: Timespecs are derived from the PCI Bus Specification, the # minimum clock delay of 0.000 ns, the maximum clock delay of 3.000 ns, # and a 75% tracking ratio between clock and data paths. # # Then, for paths on the primary global clock network: # # 1) Clk To Out = 11.000ns - 3.000ns = 8.000ns # 2) Setup = 7.000ns + 0.75 * 0.000ns = 7.000ns # 3) Grant Setup = 10.000ns + 0.75 * 0.000ns = 10.000ns # 4) AD/CBE Toff = 28.000ns - 3.000ns = 25.000ns # 5) AD/CBE Ton = 30.000ns + 11.000ns - 3.000ns = 38.000ns # 6) Period = = 30.000ns # # The following timespecs are for setup specifications. When using a # single clock, these timespecs are merged as pads-to-all. # TIMESPEC TS_ADF_SETUP = FROM : "PCI_PADS_D" : TO : "ALL_FFS" : 7.000 ; TIMESPEC TS_PAF_SETUP = FROM : "PCI_PADS_P" : TO : "ALL_FFS" : 7.000 ; TIMESPEC TS_BYF_SETUP = FROM : "PCI_PADS_B" : TO : "ALL_FFS" : 7.000 ; TIMESPEC TS_CNF_SETUP = FROM : "PCI_PADS_C" : TO : "ALL_FFS" : 7.000 ; TIMESPEC TS_GNF_SETUP = FROM : "PCI_PADS_G" : TO : "ALL_FFS" : 10.000 ; # # All critical input and output is registered to ensure clock to out # specifications are met by silicon. When using a single clock, these # timespecs are merged as all-to-pads. # TIMESPEC TS_CNF_CKOUT = FROM : "ALL_FFS" : TO : "PCI_PADS_C" : 8.000 ; TIMESPEC TS_GNF_CKOUT = FROM : "ALL_FFS" : TO : "PCI_PADS_G" : 8.000 ; # # Similar to above, the critical input and output paths are registered # to ensure clock to out specifications are made by silicon. Since this # interface uses address stepping, the clock to valid and clock to data # have different specifications. # TIMESPEC TS_ADF_CKOUT = FROM : "FAST_FFS" : TO : "PCI_PADS_D" : 8.000 ; TIMESPEC TS_ADS_TSOUT = FROM : "SLOW_FFS" : TO : "PCI_PADS_D" : 25.000 ; # TIMESPEC TS_BYF_CKOUT = FROM : "FAST_FFS" : TO : "PCI_PADS_B" : 8.000 ; TIMESPEC TS_BYS_TSOUT = FROM : "SLOW_FFS" : TO : "PCI_PADS_B" : 25.000 ; # TIMESPEC TS_PAF_CKOUT = FROM : "FAST_FFS" : TO : "PCI_PADS_P" : 8.000 ; TIMESPEC TS_PAS_TSOUT = FROM : "SLOW_FFS" : TO : "PCI_PADS_P" : 25.000 ; # # The design may be covered by a default period constraint. This is # generally sufficient when using a single clock. The period should # be set at the minimum PCI Bus clock period. # NET "SYNTH_CLK_A" PERIOD = 20.000; NET "PCLKIN" TNM_NET = USER_PCLK; NET "MCLKIN" TNM_NET = USER_MCLK; NET "PCLKOUT" PULLDOWN; NET "MCLKOUT" PULLDOWN; NET "MCLK_PCI_OUT" PULLDOWN; TIMESPEC TS_PCLK = PERIOD USER_PCLK 20 high 10; TIMESPEC TS_MCLK = PERIOD USER_MCLK TS_PCLK * 1; NET "PCLK" PERIOD = 30.000; NET "PCI_CORE/RST_I" TIG ; NET "X1_HALT" FAST; NET "X2_HALT" FAST; # ################################################################################ # User Time Names / User Time Groups ################################################################################ # # Note: Change the instance name for the user application to match the # instance name in your custom design. The example design, used here, # is called Ping. This timegroup is used to form other timegroups needed # for the interface. Do not remove it. Flip flops in this group will be # constrained to operate at the nominal PCI Bus clock frequency. If the # user application is partially asynchronous to the PCI Bus clock, this # timegroup must minimally contain the flip flops which are synchronous. # INST "BRIDGE" TNM = FFS:USER_FFS ; # For some absolutely inexplicable reason, Synplicity croaks when I try to add these # in the .sdc file. NET "X0_MEM0_SEL<0>" LOC = "AU21"; NET "X0_MEM0_SEL<1>" LOC = "AW18"; NET "X0_MEM0_SEL<2>" LOC = "AU19"; NET "X0_MEM1_SEL<0>" LOC = "B19"; NET "X0_MEM1_SEL<1>" LOC = "C19"; NET "X0_MEM1_SEL<2>" LOC = "A18"; NET "PCLKIN" LOC = "AU22"; NET "MCLKIN" LOC = "AW19"; # Force the memory data input FF's to avoid the default delay. The # memory data signal is late arriving and should never violate hold # times. NET "X0_MEM0_DATA*" NODELAY; NET "X0_MEM1_DATA*" NODELAY; # The backup logic is only used in EMB preemption mode. In this case, # MCLK is driven by PCI_CLK, which runs at 33 MHz. We can therefore # relax the timing constraints for these paths. NET "PORT0/DATA_SEL*" TPTHRU = BACKUP; NET "PORT0/CMD_SEL*" TPTHRU = BACKUP; NET "PORT1/DATA_SEL*" TPTHRU = BACKUP; NET "PORT1/CMD_SEL*" TPTHRU = BACKUP; NET "IF_M0_OVERRIDE*" TPTHRU = BACKUP; NET "IF_M1_OVERRIDE*" TPTHRU = BACKUP; NET "X1_MEM_PREEMPT*" TPTHRU = BACKUP; NET "X2_MEM_PREEMPT*" TPTHRU = BACKUP; TIMESPEC TS_BACKUP = MAXDELAY FROM : FFS : THRU : BACKUP : TO : FFS : 29.000 ; # This locks the placement of a timing-critical delay path for generating MCLK. INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.0.DM/THE_FMAP" LOC = "CLB_R64C91.S0"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.0.DM/THE_FMAP" MAP = PUC; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.1.DM/THE_FMAP" LOC = "CLB_R64C91.S0"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.1.DM/THE_FMAP" MAP = PUC; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.2.DM/THE_FMAP" LOC = "CLB_R64C91.S1"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.2.DM/THE_FMAP" MAP = PUC; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.3.DM/THE_FMAP" LOC = "CLB_R64C91.S1"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.3.DM/THE_FMAP" MAP = PUC; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.4.DM/THE_FMAP" LOC = "CLB_R63C91.S0"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.4.DM/THE_FMAP" MAP = PUC; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.5.DM/THE_FMAP" LOC = "CLB_R63C91.S0"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.5.DM/THE_FMAP" MAP = PUC; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.6.DM/THE_FMAP" LOC = "CLB_R63C91.S1"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.6.DM/THE_FMAP" MAP = PUC; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.7.DM/THE_FMAP" LOC = "CLB_R63C91.S1"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.7.DM/THE_FMAP" MAP = PUC; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.8.DM/THE_FMAP" LOC = "CLB_R62C91.S0"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.8.DM/THE_FMAP" MAP = PUC; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.9.DM/THE_FMAP" LOC = "CLB_R62C91.S0"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.9.DM/THE_FMAP" MAP = PUC; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.10.DM/THE_FMAP" LOC = "CLB_R62C91.S1"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.10.DM/THE_FMAP" MAP = PUC; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.11.DM/THE_FMAP" LOC = "CLB_R62C91.S1"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.11.DM/THE_FMAP" MAP = PUC; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.12.DM/THE_FMAP" LOC = "CLB_R61C91.S0"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.12.DM/THE_FMAP" MAP = PUC; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.13.DM/THE_FMAP" LOC = "CLB_R61C91.S0"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.13.DM/THE_FMAP" MAP = PUC; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.14.DM/THE_FMAP" LOC = "CLB_R61C91.S1"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.14.DM/THE_FMAP" MAP = PUC; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.15.DM/THE_FMAP" LOC = "CLB_R61C91.S1"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.15.DM/THE_FMAP" MAP = PUC; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.16.DM/THE_FMAP" LOC = "CLB_R60C91.S0"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.16.DM/THE_FMAP" MAP = PUC; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.17.DM/THE_FMAP" LOC = "CLB_R60C91.S0"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.17.DM/THE_FMAP" MAP = PUC; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.18.DM/THE_FMAP" LOC = "CLB_R60C91.S1"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.18.DM/THE_FMAP" MAP = PUC; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.19.DM/THE_FMAP" LOC = "CLB_R60C91.S1"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.19.DM/THE_FMAP" MAP = PUC; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.20.DM/THE_FMAP" LOC = "CLB_R59C91.S0"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.20.DM/THE_FMAP" MAP = PUC; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.21.DM/THE_FMAP" LOC = "CLB_R59C91.S0"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.21.DM/THE_FMAP" MAP = PUC; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.22.DM/THE_FMAP" LOC = "CLB_R59C91.S1"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.22.DM/THE_FMAP" MAP = PUC; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.23.DM/THE_FMAP" LOC = "CLB_R59C91.S1"; INST "BRIDGE/MCLK_SKEW_CONTROL/MGEN.23.DM/THE_FMAP" MAP = PUC; # # You may add further time names and time groups specific to your custom # design as long as the do not interfere with the timegroups and time # specs used for the interface. # ################################################################################ # User Time Specs ################################################################################ # # ################################################################################ # End ################################################################################