byucc.edif.libraries.xilinx
Class JHDL2XilinxNameMap

java.lang.Object
  java.util.AbstractMap<K,V>
      java.util.HashMap
          byucc.edif.libraries.xilinx.JHDL2XilinxNameMap

All Implemented Interfaces:

java.io.Serializable, java.lang.Cloneable, java.util.Map

public class JHDL2XilinxNameMap
extends java.util.HashMap

This class creates a Map object where the key of the Map is a JHDL Wire object. The value of the Map is a Collection of String objects where each String represents a possible Xilinx name for the given JHDL Wire. All Wire objects within the JHDL hierarchy will be in this Map.

See Also:

Serialized Form

Field Summary

private Edif2XilinxName	_edif2Xilinx
private InstanceHierarchy	_edifHierarchy
private byucc.jhdl.base.Cell	_root

Constructor Summary

JHDL2XilinxNameMap(byucc.jhdl.base.Cell root, EdifCellInstance topInstance)
Create the JHDL - Xilinx Map

Method Summary

protected void	_getAllEdifSignalNames(byucc.jhdl.base.Cell root, InstanceHierarchy hier) This method recursively traverses the hierarchy of root cell to create JHDL Wire to Xilinx name mappings.
static void	checkXPowerNameMatch(java.util.Map JHDLMap, java.util.List xpowerNames)
static java.util.ArrayList	createValueListFromMap(java.util.Map JHDLMap)
java.util.Map	getAllEdifSignalNames(byucc.jhdl.base.Cell root, InstanceHierarchy hier) This method recursively traverses the hierarchy of root cell to create JHDL Wire to Xilinx name mappings.
java.util.ArrayList	getEdifNetNames(byucc.jhdl.base.Wire wire, InstanceHierarchy hier) This method returns the Net name of a given JHDL Wire.
void	printEdifNetMap()

Methods inherited from class java.util.HashMap

clear, clone, containsKey, containsValue, entrySet, get, isEmpty, keySet, put, putAll, remove, size, values

Methods inherited from class java.util.AbstractMap

equals, hashCode, toString

Methods inherited from class java.lang.Object

finalize, getClass, notify, notifyAll, wait, wait, wait

Methods inherited from interface java.util.Map

equals, hashCode

Field Detail

_root

private byucc.jhdl.base.Cell _root

_edifHierarchy

private InstanceHierarchy _edifHierarchy

_edif2Xilinx

private Edif2XilinxName _edif2Xilinx

Constructor Detail

JHDL2XilinxNameMap

public JHDL2XilinxNameMap(byucc.jhdl.base.Cell root,
                          EdifCellInstance topInstance)

Create the JHDL - Xilinx Map

Parameters:

root - The root JHDL Cell object

topInstance - The EdifCellInstance object used to create this JHDL Cell object.

Method Detail

_getAllEdifSignalNames

protected void _getAllEdifSignalNames(byucc.jhdl.base.Cell root,
                                      InstanceHierarchy hier)

This method recursively traverses the hierarchy of root cell to create JHDL Wire to Xilinx name mappings.

Parameters:

root -

getAllEdifSignalNames

public java.util.Map getAllEdifSignalNames(byucc.jhdl.base.Cell root,
                                           InstanceHierarchy hier)

This method recursively traverses the hierarchy of root cell to create JHDL Wire to Xilinx name mappings.

Parameters:

root -

Returns:

A Map between Wire (key) and a List (value) of possible Xilinx names

getEdifNetNames

public java.util.ArrayList getEdifNetNames(byucc.jhdl.base.Wire wire,
                                           InstanceHierarchy hier)

This method returns the Net name of a given JHDL Wire.

Parameters:

wire -

Returns:

printEdifNetMap

public void printEdifNetMap()

createValueListFromMap

public static java.util.ArrayList createValueListFromMap(java.util.Map JHDLMap)

checkXPowerNameMatch

public static void checkXPowerNameMatch(java.util.Map JHDLMap,
                                        java.util.List xpowerNames)