edu.byu.ece.edif.tools.sterilize.lutreplace.logicLutRam.SRL.test
Class tb_jhdlSRL

java.lang.Object
  extended by byucc.jhdl.base.Nameable
      extended by byucc.jhdl.base.Node
          extended by byucc.jhdl.base.Cell
              extended by byucc.jhdl.base.Structural
                  extended by byucc.jhdl.Logic.LogicGates
                      extended by byucc.jhdl.Logic.LogicStatic
                          extended by byucc.jhdl.Logic.Logic
                              extended by edu.byu.ece.edif.tools.sterilize.lutreplace.logicLutRam.SRL.test.tb_jhdlSRL
All Implemented Interfaces:
byucc.jhdl.base.BooleanFlags, byucc.jhdl.base.Clockable, byucc.jhdl.base.list.TreeListable, byucc.jhdl.base.TestBench

public class tb_jhdlSRL
extends byucc.jhdl.Logic.Logic
implements byucc.jhdl.base.TestBench

Testbench used to compare logic SRL16 implementation with JHDL XIlinx SRL16 primitives.

Version:
$Id:tb_jhdlSRL.java 198 2008-04-16 21:14:21Z jamesfcarroll $
Author:
Nathan Rollins

Field Summary
(package private) static int _a
           
(package private) static int _ce
           
(package private) static int _count
           
(package private) static int _indata
           
(package private) static int _osrl161jhdl
           
(package private) static int _osrl161logic
           
(package private) static int _osrl16e1jhdl
           
(package private) static int _osrl16e1logic
           
(package private) static int _osrl16ejhdl
           
(package private) static int _osrl16elogic
           
(package private) static int _osrl16jhdl
           
(package private) static int _osrl16logic
           
(package private) static int _osrlc161jhdl
           
(package private) static int _osrlc161logic
           
(package private) static int _osrlc16e1jhdl
           
(package private) static int _osrlc16e1logic
           
(package private) static int _osrlc16ejhdl
           
(package private) static int _osrlc16elogic
           
(package private) static int _osrlc16jhdl
           
(package private) static int _osrlc16logic
           
(package private) static java.io.PrintStream _outfile
           
(package private) static java.util.Random _rand
           
(package private)  byucc.jhdl.base.Wire a
           
(package private)  byucc.jhdl.base.Wire ce
           
(package private)  byucc.jhdl.base.Wire clk
           
(package private)  byucc.jhdl.base.Wire indata
           
(package private)  byucc.jhdl.base.Wire osrl161jhdl
           
(package private)  byucc.jhdl.base.Wire osrl161logic
           
(package private)  byucc.jhdl.base.Wire osrl16e1jhdl
           
(package private)  byucc.jhdl.base.Wire osrl16e1logic
           
(package private)  byucc.jhdl.base.Wire osrl16ejhdl
           
(package private)  byucc.jhdl.base.Wire osrl16elogic
           
(package private)  byucc.jhdl.base.Wire osrl16jhdl
           
(package private)  byucc.jhdl.base.Wire osrl16logic
           
(package private)  byucc.jhdl.base.Wire osrlc161jhdl
           
(package private)  byucc.jhdl.base.Wire osrlc161logic
           
(package private)  byucc.jhdl.base.Wire osrlc16e1jhdl
           
(package private)  byucc.jhdl.base.Wire osrlc16e1logic
           
(package private)  byucc.jhdl.base.Wire osrlc16ejhdl
           
(package private)  byucc.jhdl.base.Wire osrlc16elogic
           
(package private)  byucc.jhdl.base.Wire osrlc16jhdl
           
(package private)  byucc.jhdl.base.Wire osrlc16logic
           
 
Fields inherited from class byucc.jhdl.Logic.Logic
ABOVE, ALIGN_BOTTOM, ALIGN_CENTER, ALIGN_LEFT, ALIGN_LSB, ALIGN_MSB, ALIGN_RIGHT, ALIGN_TOP, BELOW, DOWN, EAST_OF, LEFT_OF, MAX_PACK, NORTH_OF, ON, ONTOP, ONTOP_OF, RIGHT_OF, SOUTH_OF, TOLEFT, TORIGHT, UNCONSTRAINED, UP, WEST_OF
 
Fields inherited from class byucc.jhdl.Logic.LogicGates
tech_mapper
 
Fields inherited from class byucc.jhdl.base.Cell
BOOLEAN, CELL_NAME_DECLARATION, CellInterfaceDeterminesUniqueNetlistStructure, DETERMINE_FROM_STRING, GENERICS_DECLARATION, implicit_interface, IMPLICIT_INTERFACE_DECLARATION, INTEGER, INTERFACE_DECLARATION, LONG, PORT_IOS_DECLARATION, PORT_NAMES_DECLARATION, PORT_NET_NAMES_DECLARATION, PORT_PROPERTIES, PORT_WIDTHS_DECLARATION, SIGN_EXT, STRING, ZERO_PAD
 
Fields inherited from interface byucc.jhdl.base.BooleanFlags
ANTECEDANT_IS_BEHAVIORALLY_MODELED, ASYNC_PORT, ASYNCHRONOUS_RESOLVED, ATOMICALLY_PLACEABLE, ATOMICALLY_UNMAPPABLE, BEHAVIORALLY_MODELED_BRANCH, CLK_PORT, CLOCK_METHOD_IMPLEMENTED_BY_USER, CLOCK_METHOD_IS_DISABLED, CLOCKABLE_IS_SCHEDULED, DANGLING_IS_OK, DELETE_MARK, FATAL_BUILD_ERROR_OCCURED, HAS_BEEN_TRACED, HAS_USER_SPECIFIED_NAME, HWUPDATE, IMPLICIT_PORT, IN_CLK_PORT, IN_PORT, INOUT_PORT, IO_TYPE_FLAGS, IS_BEHAVIORALLY_MODELED, IS_ON_BUILD_STACK, IS_ON_PROP_LIST, IS_PLACED, METHODS_IMPLEMENTED_BY_USER, NETLISTABLE, ORIG_WIRE_IS_ATOMIC, OUT_PORT, PLACEMENT_IS_LOCKED, PROPAGATE_METHOD_IMPLEMENTED_BY_USER, PROPAGATE_METHOD_IS_DISABLED, RECURSION_FLAG, RESET_METHOD_IMPLEMENTED_BY_USER, SIMULATEABLE, SOURCELESS_IS_OK, SYNC_PORT, VISIBLE
 
Constructor Summary
tb_jhdlSRL(byucc.jhdl.base.Node parent)
          Default constructor
 
Method Summary
 void clock()
          functions to be performed on each clock transition
 void getResults()
          grab the integer version of the outputs
 boolean hasBeenTraced()
           
 boolean hasBeenTraced(boolean arg0)
           
 boolean isAsynchronouslyScheduled()
           
 boolean isAsynchronouslyScheduled(boolean arg0)
           
static void main(java.lang.String[] argv)
           
 void reset()
          default startup conditions
 void setInputs()
          drive the inputs of the design
 
Methods inherited from class byucc.jhdl.Logic.Logic
clockDriver, clockDriver, connect_implicit_ports, connectImplicitPorts, constructSubCell, constructSubCellNoImplicitPorts, enableNewPlacement, enableNewPlacement, extend, extend, getDefaultClock, getDefaultTechMapper, getGlobalClock, getSinkCell, getSourceCell, getSourceCell, getSourceLeaf, getSourcePlaceable, getSourcePlaceableLeaf, getSubCellClass, getTechMapHint, getTechMapHint, getTechMapper, growAndShiftl, lockChildPlacement, lsb, lsb, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, msb, msb, msbIndx, netlist, netlist, netlist, netlist, netlist, netlist, netlist, netlist, padClock_o, padClock_o, padClock_o, padClock, padClock, padClock, padIn_o, padIn_o, padIn_o, padIn, padIn, padIn, padInout_o, padInout_o, padInout_o, padInout, padInout, padInout, padOut_o, padOut_o, padOut_o, padOut, padOut, padOut, padOutT_o, padOutT_o, padOutT_o, padOutT, padOutT, padOutT, place, place, place, place, place, place, place, place, place, place, place, place, place, place, place, place, place, printTechMapHints, range, rotate, rotate, scale, scale, setBBox, setDefaultTechMapper, setFloorPlannerIsMaster, setTechMappingEnabled, setWandH, signExtend_o, signExtend, signExtend, sink, source, takeBot_o, takeBot, takeBot, takeBotSigned_o, takeBotSigned, takeTop_o, takeTop, takeTop, techmap, techMappingEnabled, translate, translate, zeroExtend_o, zeroExtend, zeroExtend, zeroExtendRight_o, zeroExtendRight
 
Methods inherited from class byucc.jhdl.Logic.LogicStatic
add_o, add_o, and_o, and_o, and, and, buf_o, buf_o, buf, buf, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant, constant, constant, constant, constant, constant, constant, constant, constant, constant, gnd_o, gnd_o, gnd, gnd, gnd, gnd, mux_o, mux, nc, nc, nc, nc, nc, nc, not_o, not_o, not, not, or_o, or_o, or, or, reg_o, reg, vcc_o, vcc_o, vcc, vcc, vcc, vcc, wire, wire, wire, wire, xnor_o, xnor_o, xnor, xor_o, xor
 
Methods inherited from class byucc.jhdl.Logic.LogicGates
add_o, add_o, add_o, add_o, add_o, add_o, add, add, add, add, addsub_o, addsub_o, addsub_o, addsub_o, addsub_o, addsub_o, addsub, addsub, addsub, addsub, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, ashiftr_o, ashiftr, ashiftr, buf_o, buf_o, buf, buf, checkValueRepresentableInWidth, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant, constant, constant, constant, constant, constant, constant, constant, constant, constant, gnd_o, gnd_o, gnd, gnd, gnd, gnd, mux_o, mux_o, mux_o, mux_o, mux_o, mux_o, mux, mux, mux, mux, mux, mux, name, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nc, nc, nc, nc, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, not_o, not_o, not, not, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or, or, or, or, or, or, or, or, or, or, or, or, or, or, or, or, or, or, pulldown, pulldown, pullup, pullup, reg_o, reg_o, reg_o, reg_o, reg, reg, reg, reg, regc_o, regc_o, regc_o, regc_o, regc, regc, regc, regc, regce_o, regce_o, regce_o, regce_o, regce, regce, regce, regce, regp_o, regp_o, regp_o, regp_o, regp, regp, regp, regp, regpe_o, regpe_o, regpe_o, regpe_o, regpe, regpe, regpe, regpe, regr_o, regr_o, regr_o, regr_o, regr, regr, regr, regr, regre_o, regre_o, regre_o, regre_o, regre, regre, regre, regre, regs_o, regs_o, regs_o, regs_o, regs, regs, regs, regs, regse_o, regse_o, regse_o, regse_o, regse, regse, regse, regse, shiftl_o, shiftl, shiftl, shiftr_o, shiftr, shiftr, sub_o, sub_o, sub_o, sub_o, sub_o, sub_o, sub, sub, sub, sub, tbuf_o, tbuf_o, tbuf, tbuf, vcc_o, vcc_o, vcc, vcc, vcc, vcc, wire, wire, wire, wire, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor
 
Methods inherited from class byucc.jhdl.base.Structural
behavioralModelIsAvailable, clockMethodIsDisabled, clockMethodIsDisabled, clockMethodIsEnabled, clockMethodIsEnabled, defaultSimulationModelIsBehavioral, hasBehaviorInClockMethod, hasBehaviorInPropagateMethod, isFallingEdgeTriggered, isReadyToBeAsynchronouslyScheduled, isRisingEdgeTriggered, needsToBeAsynchronouslyScheduled, needsToBeClocked, propagate, propagateMethodIsDisabled, propagateMethodIsDisabled, propagateMethodIsEnabled, propagateMethodIsEnabled, willUseHWUpdate, willUseHWUpdate
 
Methods inherited from class byucc.jhdl.base.Cell
addPort, addPorts, addProperties, addProperties, addProperty, addProperty, addProperty, addProperty, antecedantIsBehaviorallyModeled, antecedantIsBehaviorallyModeled, bind, bind, bind, bind, cellInterfaceDeterminesUniqueNetlistStructure, clk, connect, connectAllWires, connectOptional, disableAllBehavioralModels, disableBehavioralModel, enableBehavioralModel, getArgument, getAttachedPort, getAttachedWire, getAttachedWireNoException, getCellName, getCellNetlist, getCellNetList, getCellNetlist, getCellNetlist, getDescendents, getFlatNetlist, getFlatNetlistableChildren, getGeneric, getHeight, getNetlistableChildren, getPlacementInfo, getPortProperties, getPortRecord, getPortRecords, getProperties, getProperty, getPropertyValue, getSinkWires, getSourceWires, getUniqueCellName, getWidth, getX, getY, hasBeenTraced, hasBeenTraced, hasPort, hasPorts, in, in, inout, inout, isAsynchronouslyScheduled, isAsynchronouslyScheduled, isAsynchronousSourceSinkResolved, isBehaviorallyModeled, isBehaviorallyModeledBranch, isInput, isLeafCell, isNetlistable, isNetlistable, isNetlistablePort, isNetlistLeaf, isNotNetlistable, isNotNetlistablePort, isNotVisible, isOutput, isPlaceable, isPlaceable, isPlaced, isPlaced, isPlacementLocked, isRoot, isSimulateable, isSimulateable, isSink, isSource, isVisible, isVisible, join, lockPlacement, nc, out, out, param, popHierarchy, port, port, port, postorderCheck, preorderCheck, pushHierarchy, pushHierarchy, pushHierarchy, pushHierarchy, pushHierarchyNoImplicitPorts, pushHierarchyNoImplicitPorts, removeAllUnconnectedPorts, removePort, removeProperty, replaceProperty, replaceProperty, resetBehavioralModelsToDefaults, setAsynchronousSourceSinkResolved, setGeneric, setHeight, setNotNetlistable, setNotNetlistable, setNotVisible, setNotVisible, setPlacementInfo, setPortNotNetlistable, setPortNotNetlistable, setProperty, setWidth, subClassDelete, toString, uniquifyCell, userDefinedClockCount, verifyAndCleanup
 
Methods inherited from class byucc.jhdl.base.Node
addObservable, addSimulatorCallback, checkAll, delete, getBuildingFlag, getChildren, getChildrenEnumeration, getInstanceName, getParent, getParentCell, getRelatives, getSystem, getWires, optimize, orphanAllowed, printAllChildren, printTree, removeSimulatorCallback, setDefaultClock
 
Methods inherited from class byucc.jhdl.base.Nameable
caseSensitivity, caseSensitivity, disableNameClashChecking, getFullName, getFullNameNoTestBench, getHierNameNoTestBench, getInstanceNo, getInstanceNumber, getLeafName, getLeafName, getRelativeName, getUserName, getUserName, hasUserSpecifiedName, isDescendantOf, setInstanceNumber
 
Methods inherited from class java.lang.Object
clone, equals, finalize, getClass, hashCode, notify, notifyAll, wait, wait, wait
 

Field Detail

_count

static int _count

_a

static int _a

_ce

static int _ce

_indata

static int _indata

_osrl16jhdl

static int _osrl16jhdl

_osrl161jhdl

static int _osrl161jhdl

_osrl16ejhdl

static int _osrl16ejhdl

_osrl16e1jhdl

static int _osrl16e1jhdl

_osrlc16jhdl

static int _osrlc16jhdl

_osrlc161jhdl

static int _osrlc161jhdl

_osrlc16ejhdl

static int _osrlc16ejhdl

_osrlc16e1jhdl

static int _osrlc16e1jhdl

_osrl16logic

static int _osrl16logic

_osrl161logic

static int _osrl161logic

_osrl16elogic

static int _osrl16elogic

_osrl16e1logic

static int _osrl16e1logic

_osrlc16logic

static int _osrlc16logic

_osrlc161logic

static int _osrlc161logic

_osrlc16elogic

static int _osrlc16elogic

_osrlc16e1logic

static int _osrlc16e1logic

_outfile

static java.io.PrintStream _outfile

_rand

static java.util.Random _rand

a

byucc.jhdl.base.Wire a

ce

byucc.jhdl.base.Wire ce

clk

byucc.jhdl.base.Wire clk

indata

byucc.jhdl.base.Wire indata

osrl16jhdl

byucc.jhdl.base.Wire osrl16jhdl

osrl161jhdl

byucc.jhdl.base.Wire osrl161jhdl

osrl16ejhdl

byucc.jhdl.base.Wire osrl16ejhdl

osrl16e1jhdl

byucc.jhdl.base.Wire osrl16e1jhdl

osrlc16jhdl

byucc.jhdl.base.Wire osrlc16jhdl

osrlc161jhdl

byucc.jhdl.base.Wire osrlc161jhdl

osrlc16ejhdl

byucc.jhdl.base.Wire osrlc16ejhdl

osrlc16e1jhdl

byucc.jhdl.base.Wire osrlc16e1jhdl

osrl16logic

byucc.jhdl.base.Wire osrl16logic

osrl161logic

byucc.jhdl.base.Wire osrl161logic

osrl16elogic

byucc.jhdl.base.Wire osrl16elogic

osrl16e1logic

byucc.jhdl.base.Wire osrl16e1logic

osrlc16logic

byucc.jhdl.base.Wire osrlc16logic

osrlc161logic

byucc.jhdl.base.Wire osrlc161logic

osrlc16elogic

byucc.jhdl.base.Wire osrlc16elogic

osrlc16e1logic

byucc.jhdl.base.Wire osrlc16e1logic
Constructor Detail

tb_jhdlSRL

public tb_jhdlSRL(byucc.jhdl.base.Node parent)
Default constructor

Parameters:
parent - parent node
Method Detail

clock

public void clock()
functions to be performed on each clock transition

Specified by:
clock in interface byucc.jhdl.base.Clockable
Overrides:
clock in class byucc.jhdl.base.Structural

getResults

public void getResults()
grab the integer version of the outputs


reset

public void reset()
default startup conditions

Specified by:
reset in interface byucc.jhdl.base.Clockable
Overrides:
reset in class byucc.jhdl.base.Structural

setInputs

public void setInputs()
drive the inputs of the design


main

public static void main(java.lang.String[] argv)
                 throws java.lang.Exception
Throws:
java.lang.Exception

isAsynchronouslyScheduled

public boolean isAsynchronouslyScheduled()

isAsynchronouslyScheduled

public boolean isAsynchronouslyScheduled(boolean arg0)

hasBeenTraced

public boolean hasBeenTraced()

hasBeenTraced

public boolean hasBeenTraced(boolean arg0)