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java.lang.Objectedu.byu.ece.edif.util.export.jhdl.Edi2JHDL
public class Edi2JHDL
This class is used to generate a JHDL circuit from an EDIF object. Generates a JHDL circuit for the designated EdifCellInstance.
TO-DO:
| Field Summary | |
|---|---|
static java.lang.String |
EDIF_CELL_INSTANCE_PROPERTY
The JHDL Cell property name used for holding original EDIF instance object. |
static java.lang.String |
EDIF_NET_PROPERTY
The JHDL Net property name used for holding original EDIF EDIFNet. |
private java.lang.String |
technology
the targeting technology name * |
| Constructor Summary | |
|---|---|
Edi2JHDL(java.lang.String techName)
Constructs an Edi2JHDL Object with the specified name. |
|
| Method Summary | |
|---|---|
protected java.lang.String |
_getPropertyINITString(EdifCellInstance leafCell,
java.lang.String initDefault,
java.lang.String initString,
int argSize,
int initPos,
int initDepth,
java.lang.Class[] arg_class,
java.lang.Object[] args)
It is important to retrieve INIT strings from the EDIF file to pass to JHDL constructors. |
protected void |
addCellInstanceProperties(EdifCellInstance cellInst,
byucc.jhdl.base.Cell cell,
boolean addEdifCellInstanceAsProperty)
Add properties to the JHDL Cell according to the EdifCellInstance. |
protected void |
addNetProperties(EdifNet net,
byucc.jhdl.base.Wire wire,
boolean addEdifCellInstanceAsProperty)
|
private boolean |
containsPortName(EdifCell cell,
java.lang.String portName)
Returns true if the EdifCell contains a port with named after the given String. |
protected byucc.jhdl.base.Cell |
createBlackBoxModel(byucc.jhdl.base.Cell parent,
EdifCellInstance cellInstance,
byucc.jhdl.base.Wire[] portWires,
boolean addEdifCellInstanceAsProperty)
Create a black box for the EDIF cell that is not in the JHDL library. |
java.util.Map |
createInstanceToPortRefArrayMap(EdifCell parent,
EdifCellInstance mapInst)
This method creates a mapping between an EdifCellInstance and all its corresponding EdifPortRefs. |
java.util.Map |
createInstanceToPortRefArrayMapDebug(EdifCell parent,
EdifCellInstance thisInst,
boolean debug)
Instances to Mapping of Ports to portRef array * |
protected void |
createLeafCell(byucc.jhdl.base.Cell parent,
EdifCellInstance leafCell,
java.util.ArrayList wires,
boolean addEdifCellInstanceAsProperty)
Create the leaf cell as the sub cell of the parent cell. |
protected void |
createSubCellWires(EdifCellInstance subcell,
EdifCellInstance parentCell,
java.util.ArrayList wires,
byucc.jhdl.base.Cell jhdlInstance,
java.util.HashMap internalWires,
java.util.Map instToMap)
Creates an ArrayList of JHDL Wire Objects to connect with the ports of the sub cell. |
java.util.HashMap |
getMatchingPorts(EdifCell xilinxCell,
EdifCell actualCell)
This method will search through the EdifPorts of two EdifCells and looks for ports with the same 'base name'. |
protected java.lang.String |
getNetNameFromPort(EdifPort port,
int busMember,
EdifCellInstance subCellInstance,
java.util.Map instToMap)
Get the connected net name that the port (can be a bus port member also) of the subCellInstance connects to in the nets of the parent CellInstance. |
boolean |
isAlmostSameEdifCell(EdifCell xilinxCell,
EdifCell actualCell)
This method compares EdifPorts from two EdifCells to determine if they are the same. |
boolean |
isSameEdifCell(EdifCell xilinxCell,
EdifCell actualCell)
This method compares EdifPorts from two EdifCells to determine if they are the same. |
static java.lang.String |
JHDL_ID(java.lang.String id)
This method will change a name to a JHDL qualified name. |
private static int |
parseMemDepth(java.lang.String name)
Method used to parse the depth of the ram or rom (in ramMxN its the number associated with 'N'. |
private static java.lang.String |
parseMemMxNPropertyLength(java.lang.String name)
In ramMxN, this method returns the 'M' for ram or roms. |
byucc.jhdl.base.Cell |
toJHDLCircuit(byucc.jhdl.base.Cell parent,
EdifCellInstance cellInstance,
byucc.jhdl.base.Wire[] portWires)
|
byucc.jhdl.base.Cell |
toJHDLCircuit(byucc.jhdl.base.Cell parent,
EdifCellInstance cellInstance,
byucc.jhdl.base.Wire[] portWires,
boolean addEdifObjectAsProperty)
This method will create a JHDL Cell for an EdifCellInstance object, as a sub JHDL Cell of the "parent" JHDL Cell, and connect all the passed in JHDL Wires to the created JHDL Cell's ports, and finally, it will return this created JHDL Cell. |
| Methods inherited from class java.lang.Object |
|---|
clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait |
| Field Detail |
|---|
public static final java.lang.String EDIF_CELL_INSTANCE_PROPERTY
public static final java.lang.String EDIF_NET_PROPERTY
private java.lang.String technology
| Constructor Detail |
|---|
public Edi2JHDL(java.lang.String techName)
techName - The technology for JHDL| Method Detail |
|---|
public java.util.Map createInstanceToPortRefArrayMapDebug(EdifCell parent,
EdifCellInstance thisInst,
boolean debug)
public java.util.Map createInstanceToPortRefArrayMap(EdifCell parent,
EdifCellInstance mapInst)
For each key a Map value is returned. This map has
parent - - the parent EdifCellmapInst - - the EdifCellInstance to create the Map from
public java.util.HashMap getMatchingPorts(EdifCell xilinxCell,
EdifCell actualCell)
This HashMap links the single multi-bit ports with the multiple single-bit ports.
xilinxCell - - 'xilinx' EdifCellactualCell - - 'actual' EdifCell
public boolean isAlmostSameEdifCell(EdifCell xilinxCell,
EdifCell actualCell)
xilinxCell - - first EdifCellactualCell - - second EdifCell
public boolean isSameEdifCell(EdifCell xilinxCell,
EdifCell actualCell)
xilinxCell - - first EdifCellactualCell - - second EdifCell
public static java.lang.String JHDL_ID(java.lang.String id)
id - The String to make JHDL-valid
public byucc.jhdl.base.Cell toJHDLCircuit(byucc.jhdl.base.Cell parent,
EdifCellInstance cellInstance,
byucc.jhdl.base.Wire[] portWires)
public byucc.jhdl.base.Cell toJHDLCircuit(byucc.jhdl.base.Cell parent,
EdifCellInstance cellInstance,
byucc.jhdl.base.Wire[] portWires,
boolean addEdifObjectAsProperty)
parent - a CellcellInstance - an EdifCellInstanceportWires - a Wire[]
Cell
protected void addCellInstanceProperties(EdifCellInstance cellInst,
byucc.jhdl.base.Cell cell,
boolean addEdifCellInstanceAsProperty)
cellInst - Takes all of this EdifCell's Property Objects, and adds
them to the JHDL Cellcell - The JHDL Cell that will get all of the EdifCell's PropertiesaddEdifCellInstanceAsProperty - If true, this flag adds a property
to the JHDL cell whose key is held by the string EDIF_CELL_INSTANCE_PROPERTY, and whose value is an EdifCellInstance.
protected void addNetProperties(EdifNet net,
byucc.jhdl.base.Wire wire,
boolean addEdifCellInstanceAsProperty)
protected byucc.jhdl.base.Cell createBlackBoxModel(byucc.jhdl.base.Cell parent,
EdifCellInstance cellInstance,
byucc.jhdl.base.Wire[] portWires,
boolean addEdifCellInstanceAsProperty)
EdifBlackBoxCell,
inserting the ports, and connecting them to wires. On each clock, this
black box cell will put 0s on each of it's out/inout wires.
parent - The parent cell to the black box cellInstancecellInstance - The EdifCellInstance referring to a black box
EdifCellportWires - An ArrayList of Wire Objects
protected void createLeafCell(byucc.jhdl.base.Cell parent,
EdifCellInstance leafCell,
java.util.ArrayList wires,
boolean addEdifCellInstanceAsProperty)
parent - The parent of the created leaf cellleafCell - The EdifCellInstance that represents the leafCellwires - An ArrayList of Wire Objects
protected void createSubCellWires(EdifCellInstance subcell,
EdifCellInstance parentCell,
java.util.ArrayList wires,
byucc.jhdl.base.Cell jhdlInstance,
java.util.HashMap internalWires,
java.util.Map instToMap)
subcell - The subcell to the parentCell for creating wiresparentCell - The parent to the subcellwires - The Collection that will contain the created Wire ObjectsjhdlInstance - Used to create the JDHL Wire objectsinternalWires - JHDL Wire Objects
protected java.lang.String _getPropertyINITString(EdifCellInstance leafCell,
java.lang.String initDefault,
java.lang.String initString,
int argSize,
int initPos,
int initDepth,
java.lang.Class[] arg_class,
java.lang.Object[] args)
leafCell - initDefault - initString - argSize - initPos - initDepth - arg_class - args -
protected java.lang.String getNetNameFromPort(EdifPort port,
int busMember,
EdifCellInstance subCellInstance,
java.util.Map instToMap)
port - The EdifPort Object owned by the subCellInstancebusMember - The bus member of the EdifPortRefsubCellInstance - The EdifCellInstance owning port
private boolean containsPortName(EdifCell cell,
java.lang.String portName)
cell - The cell whose EdifPort Objects will be checked
private static int parseMemDepth(java.lang.String name)
name - The name of the ram or rom
private static java.lang.String parseMemMxNPropertyLength(java.lang.String name)
name - The name of the class to parse
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