• Iterations: 5810024
• Clock frequency: 10 MHz
• Freerunning clock
• Sequential corruption
• Persistence wait time: 1000 u seconds
• Persistence error window: 50 cycles

• Sensitivity test error rate: 515589 / 5810024 = %8.87413
• Persistence test error rate: 0 / 5810024 = %0
• Total test time: 1801 seconds
• 0.000309982 seconds per iteration

Figure 1a: Physical Placement of Sensitive Configuration Bits in 54-bit Virtex Multiplier


Figure 1b: Physical Placement of Persistent Configuration Bits in 54-bit Virtex Multiplier