• Iterations: 5810024
• Clock frequency: 10 MHz
• Freerunning clock
• Sequential corruption
• Persistence wait time: 1000 u seconds
• Persistence error window: 50 cycles

• Sensitivity test error rate: 436532 / 5810024 = %7.51343
• Persistence test error rate: 41 / 5810024 = %0.000705677
• Total test time: 6111 seconds
• 0.0010518 seconds per iteration

Figure 1a: Physical Placement of Sensitive Configuration Bits in 72-bit Virtex Multiplier


Figure 1b: Physical Placement of Persistent Configuration Bits in 72-bit Virtex Multiplier


Figure 2a: Detail of Physical Placement of Sensitive Configuration Bits in 72-bit Virtex Multiplier in a Zoomed Window


Figure 2b: Detail of Physical Placement of Persistent Configuration Bits in 72-bit Virtex Multiplier in a Zoomed Window